East Coast Part Supplier and Warehouse Association Moderated Interchange Newsgroup > Connecticut
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> Sdram 64MB 167MHZ 86TSOP MT48LC2M32B2 micron
Sdram 64MB 167MHZ 86TSOP MT48LC2M32B2 micron
SDRAM 64MB 167MHZ 86TSOP MT48LC2M32B2TG-6G
Fully synchronous; all signals registered on positive edge of system clock
Internal pipelined operation; column address can be changed every clock cycle
Internal banks for hiding row access/precharge
Programmable burst lengths: 1, 2, 4, 8, or full page
Auto precharge, includes concurrent auto precharge, and auto refresh modes
64ms, 4,096-cycle refresh (15.6µs/row)
LVTTL-compatible inputs and outputs
Single +3.3V ±0.3V power supply
Supports CAS latency (CL) of 1, 2, and 3
